Design Protection Using Logic Encryption and Scan-Chain Obfuscation Techniques

Due to increase in threats posed by offshore foundries, the companies outsourcing IPs are forced protect their designs from foundries. Few of IP piracy, counterfeiting and reverse engineering. To overcome these, logic encryption has been observed be a leading countermeasure against faced. It introduces extra gates design, known as key which hide functionality design unless correct keys fed them.  The scan tests used various observe fault coverage. These chains can become vulnerable side-channel attacks. potential solution for protection this vulnerability is obfuscation output chain. This involves shuffling working cells chain when incorrect test fed. In paper, we propose method well circuit. efficiency secured verified on ISCAS’89 circuits results prove security proposed posed.